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//******************************************************************
// Project : Remmocon application Program
// Device : MC96F7416S
// Date : '2013.11.21~
// Author : nakwon.ma
//
// File :
// Variable.h Global variable define
// Main.c main frame structure
// Key.c Key scan and execute
// Time.c clock function
// Lcd.c Lcd Display
//
//
// History :
//
// 1. 2013.11.21 Program coding start
//
//******************************************************************
//------------------------------------------------------------------
// Include file and variable
//------------------------------------------------------------------
#include <intrins.h>
//#include "MC96F7616A.h"
#include "MC96F7416S.h"
#include "def.h"
#define MyDef // global variable
#include "Variable.h" // User variable define
//------------------------------------------------------------------
// external prototype function
//------------------------------------------------------------------
extern void Process_Key(); // Key.c
extern void Read_Self_Bias(); //
extern void Process_Time(); //Time.c
//extern void Wait_uSec();
extern void Process_Lcd(); // Lcd.c
extern void Lcd_Initialize(); //
//extern void Tx_RemoconSig(); // Key.c
//extern void Wait_uSec(Word); //
extern void Wait_uSec(DELAY); //
//extern void Wait_uSec(); //
//==================================================================
// Peripheral Register Initialize
//==================================================================
static void Initial( void )
{
#if 0 //w
#else
//Xout_Xin function setting
P9FSR =0 //Port9 Function Selection Register
|(0<<2) //0:P93 Port (EINT10 function possible when input), 1:T0O/PWM0O Function
|(0<<1) //0:P91 Port, 1:XOUT Function
|(0<<0) //0:P90 port, 1:XIN Function
;
//7416S綽 reset pin 絕瀾
/*--- Set Port_9 --------------------------------------------------------------------
* P9.3 : Dout,NOT_USED 1
* .2 : Din, NOT_USED 0
* .1 : Dout, NOT_USED 1
* .0 : Dout, NOT_USED 1
*-----------------------------------------------------------------------------------
*/
P9 = _0000_0000; // P9 Data Register
P9IO = _1111_1011; // P9 Direction Register //0:input, 1:output
P9OD = _0000_0000; // P9 Open-drain Selection Register //0:push-pull, 1:open-drain
P9PU = _0000_0100; // P9 Pull-up Resistor Selection Register //0:disable, 1:enable
/*--- Oscillator Control ----------------------------------------------------------------
* OSCCR : 0000 0000 = 0x00 : Oscillator Control Register
* OSCCR = 0x00; // initial int_1Mhz,int_osc enable,main_osc enable,sub_osc enalbe
*-----------------------------------------------------------------------------------
*/
OSCCR =0 //Oscillator Control Register
|(1<<3) //0:int_0_5Mhz, 1:int_1Mhz, 2:int_2Mhz, 3: int_4Mhz //6832客促撫
|(0<<2) //0:int_osc enable, 1:int_osc disable
|(0<<1) //0:main_osc disable, 1:main_osc enable
|(1<<0) //0:sub_osc disable, 1:sub_osc enable //sub_osc enable老版快 2uA 家葛
//|(0<<0) //0:sub_osc disable, 1:sub_osc enable //sub_osc enable老版快 2uA 家葛
;
//2013_11_21 by nakwon test
//internal fx=1Mhz, bit clock 1Mhz/4096=4ms, overflow period=bit clock* 4= 16ms
// BITCR=(1<<3)|(1<<0); // BIT counter clear!!
// while((BITCR&0x80)==0); // BIT 救瀝拳 16ms wait time @ int_osc 1Mhz
//NOTE!!! PwrSave Mode (fsub=500mSec Delay for stabilization)
//for test port setting
//P4 = _0000_0000; // P4 Data Register
//P4IO = _1111_1111; // P4 Direction Register //0:input, 1:output
//P4OD = _0000_0000; // P4 Open-drain Selection Register //0:push-pull, 1:open-drain
//P4PU = _0000_0000; // P4 Pull-up Resistor Selection Register //0:disable, 1:enable
//P40 = 1; //救利拳 test 儈
//sub_osc enable stabilization time 1s
Wait_uSec(60000); //about 270ms @ INT_OSC 1Mhz(7416S)
Wait_uSec(60000); //
Wait_uSec(60000); //
Wait_uSec(60000); //
//P40 = 0; //救利拳 test 儈
/*--- Set System and Clock Control ------------------------------------------------------
* SCCR : 0000 0000 = 0x00 : System and Clock Control Register.
* SCCR = 0x01; // wons,psave,-,-,-,-,sclk1,sclk0
*-----------------------------------------------------------------------------------
*/
//2013_11_21 by nakwon FLL test
FLLCR |= _0000_1011; //FLL enable, 7.995MHz
//FLLCR |= _0000_0011; //FLL enable, 3.998MHz
//P40 = 1; //救利拳 test 儈
//FLL enalbe stabilization time about 16ms
//internal fx=1Mhz, bit clock 1Mhz/4096=4ms, overflow period=bit clock* 4= 16ms
BITCR=(1<<3)|(1<<0); // BIT counter clear!!
while((BITCR&0x80)==0); // BIT 救瀝拳 16ms wait time @ int_osc 1Mhz
//P40 = 0; //救利拳 test 儈
//INT_OSC--> FLL clock change!!
SCCR =0 //System and Clock Control Register
|(0<<7) //0:WDTRCOSC disable at stop mode, 1:WDTRCOSC enable at stop mode
//|(0<<6) //0:power save disable, 1:power save enable
|(1<<6) //0:power save disable, 1:power save enable //p save mode enable矯 4uA 臨烙
|(3<<0) //0:INT_RC OSC, 1:external OSC, 2:external sub_osc, 3:FLL
;
// int_osc disable & main_osc enable,sub_osc enable!!
// INT_OSC disable
OSCCR|=(1<<2); //0:int_osc enable, 1:int_osc disable
/*--- Set Basic Timer ---------------------------------------------------------------
* BITCR : 0000 0000 = 0x00 : Basic Timer Control Register
* BITCR = 0x01; // bitifr,-,-,-,bclr,bck2,bck1,bck0
* / fx=8Mhz, bit clock 8Mhz/4096=0.5ms, overflow period=bit clock* 4= 2ms
*-----------------------------------------------------------------------------------
*/
BITCR =0 //Oscillator Control Register
|(0<<7) //0:BIT Interrupt no generation, 1:BIT Interrupt generation
|(0<<5)//0:fx/4096, 1:fx/1024, 2:fx/128, 3: fx/16
|(0<<3) //0:Free running, 1:Clear counter
|(1<<0) //0:Clock*2, 1:Clock*4, 2:Clock*8, 3:Clock*16, 4:Clock*32, 5:Clock*64, 6:Clock*128, 7:Clock*256
;
//LVRCR = 0x00; //LVREN[0]= 0: LVR enable, 1:LVR disable // enable 矯 12uA ~~14uA 家葛
LVRCR = 0x01; //LVREN[0]= 0: LVR enable, 1:LVR disable //
/*--- Set WATCH DOG TIMER ----------------------------------------------------------
* WDT Interrupt Interval=(BIT Interrupt Interval)*(WDTDR Value +1)
* WDT Interrupt Interval=4ms*(0xff + 1)= 1s
*-----------------------------------------------------------------------------------
*/
//WDT disable
//WDTCR = 0xE0; // wdten,wdtrson,wdtcl,-,-,-,-,wdtifr WDT Enable! org
WDTCR = 0x00; // wdten,wdtrson,wdtcl,-,-,-,-,wdtifr WDT disable!! 犬牢
/*--- Set Watch Timer (0.5Sec Interval INT) -----------------------------------------
* wtenable,2hz,fsub=32.768khz(0.5sec interval)
* WTCR = 0x98; //WTEN,-,-,WTIFR,WTIN1,WTIN0,WTCK1,WTCK0 // WT Enable
*-----------------------------------------------------------------------------------
*/
//lcd 備悼闌 sub osc肺且版快救瀝拳 time撈鞘夸竊 !!
//WT 1min interrupte
WTDR = 0x77; // Watch Timer Data Register // Sub Clock fsub /( 2*14 x (count+1) )= 1盒
WTCR =0 //Oscillator Control Register
|(1<<7) //0:WT disable, 1:WT enable
|(1<<4) //0:WT int no gen, 1:WT int gen
|(3<<2) //0:fwck/2^7, 1:fwck/2^13, 2:fwck/2^14, 3: fwck/(2^14*(WTDR value+1))
|(0<<0)//0:fsub, 1:fx/256, 2:fx/128, 3: fx/64 //sub osc change!!//org
//|(1<<0)//0:fsub, 1:fx/256, 2:fx/128, 3: fx/64 //fx/256 clock change!!
;
/*--- Set Port Function Selection control ------------------------------------------------
* port setting and PFSR setting
*-----------------------------------------------------------------------------------
*/
//7416S狼版快
/*--- Set Port_0 --------------------------------------------------------------------
* P0.7 : Dout, REM_OUT 1, PP
* .6 : x
* .5 : x
* .4 : x
* .3 : Dout, NOT_USED 1, PP
* .2 : x
* .1 : x
* .0 : x
*-----------------------------------------------------------------------------------
*/
P0 = _0000_0000; // P0 Data Register
P0IO = _1000_1000; // P0 Direction Register //0:input, 1:output
P0OD = _0000_0000; // P0 Open-drain Selection Register //0:push-pull, 1:open-drain
P0PU = _0111_0111; // P0 Pull-up Resistor Selection Register //0:disable, 1:enable
P0DB = _0000_0000; // P0 Debounce Enable Register //0:disable, 1:enable
//rem out function 眠啊
P03FSR =0 //Port 0/3 Function Selection Register
//|(0<<7) //0:P33 port, 1:TXD
//|(0<<6) //0:P32 port, 1:T2O/PWM2O
//|(0<<5) //0:P31 port, 1:T3O/PWM3O
|(0<<4) //0:P30 port, 1:LVIREF
|(1<<3) //0:P07 port, 1:REM
//|(0<<2) //0:P05 port, 1:SO
//|(0<<1) //0:P04 port, 1:SCK-out
|(0<<0) //0:P03 port, 1:BUZO
;
/*
P03FSR =0 //Port 0/3 Function Selection Register
|(0<<7) //0:P33 port, 1:TXD
|(0<<6) //0:P32 port, 1:T2O/PWM2O //7616A俊綽絕瀾. 0 setting!!
|(0<<5) //0:P31 port, 1:T3O/PWM3O //7616A俊綽絕瀾. 0 setting!!
|(0<<4) //0:P30 port, 1:LVIREF
|(0<<3) //0:P07 port, 1:REM
|(0<<2) //0:P05 port, 1:SO //7616A俊綽絕瀾. 0 setting!!
|(0<<1) //0:P04 port, 1:SCK-out //7616A俊綽絕瀾. 0 setting!!
|(0<<0) //0:P03 port, 1:BUZO
;
*/
/*--- Set Port_1 --------------------------------------------------------------------
* P1.7 : Din, KIN_2 0, PU
* .6 : Din, KIN_1 0, PU
* .5 : Din, x 0, PU
* .4 : Din, x 0, PU
* .3 : Din, x 0, PU
* .2 : Din, x 0, PU
* .1 : Din, x 0, PU
* .0 : Din, KIN_0 0, PU
*-----------------------------------------------------------------------------------
*/
P1 = _0000_0000; // P1 Data Register
P1IO = _0000_0000; // P1 Direction Register //0:input, 1:output
P1OD = _0000_0000; // P1 Open-drain Selection Register //0:push-pull, 1:open-drain
P1PU = _1111_1111; // P1 Pull-up Resistor Selection Register //0:disable, 1:enable org
P1DB = _0000_0000; // P1 Debounce Enable Register //0:disable, 1:enable
P1FSR =0 //Port 1 Function Selection Register
//|(0<<3) //0:P13 Port (EINT3 function possible when input), 1:AN7
//|(0<<2) //0:P12 Port (EINT2 function possible when input), 1:AN6
//|(0<<1) //0:P11 Port (EINT1 function possible when input), 1:AN5
|(0<<0) //0:P10 Port (EINT0 function possible when input), 1:AN4
;
/*--- Set Port_2 --------------------------------------------------------------------
* P2.7 : Ain, ADC3 0, ADC3
* .6 : Dout, NOT_USED 1, PP
* .5 : Dout, NOT_USED 1, PP
* .4 : Dout, x 1, PP
* .3 : Dout, NOT_USED 1, PP
* .2 : Dout, NOT_USED 1, PP
* .1 : Dout, x 1, PP
* .0 : Dout, x 1, PP
*-----------------------------------------------------------------------------------
*/
P2 = _0000_0000; // P2 Data Register
P2IO = _0111_1111; // P2 Direction Register //0:input, 1:output
P2OD = _0000_0000; // P2 Open-drain Selection Register ?? //0:push-pull, 1:open-drain
P2PU = _0000_0000; // P2 Pull-up Resistor Selection Register //0:disable, 1:enable
P2FSR =0 //Port 2 Function Selection Register
|(1<<7) //0:P27 port, 1:AN3
|(0<<6) //0:P26 port, 1:AN2
|(0<<5) //0:P25 port, 1:AN1
//|(0<<4) //0:P24 port, 1:AN0
|(0<<3) //0:P23 port, 1:SEG36
|(0<<2) //0:P22 port, 1:SEG35
//|(0<<1) //0:P21 port, 1:SEG34
//|(0<<0) //0:P20 port, 1:SEG33
;
//7616S狼版快
/*--- Set Port_3 --------------------------------------------------------------------
* P3.4 : Dout,x 1, PP
* .3 : Dout, x 1, PP
* .2 : x
* .1 : x
* .0 : Din, Key4 1, PP, // 犬牢 !!
*-----------------------------------------------------------------------------------
*/
P3 = _0000_0000; // P3 Data Register
P3IO = _0001_1000; // P3 Direction Register //0:input, 1:output
P3OD = _0000_0000; // P3 Open-drain Selection Register //0:push-pull, 1:open-drain
P3PU = _0000_0111; // P3 Pull-up Resistor Selection Register //0:disable, 1:enable
/*--- Set Port_4 --------------------------------------------------------------------
* P4.7 : Dout, LCD_COM1 1, LCD
* .6 : Dout, LCD_COM0 1, LCD
* .5 : Dout, NOT_USED
* .4 : Dout, NOT_USED
* .3 : Dout, NOT_USED
* .2 : Dout, NOT_USED
* .1 : Dout, NOT_USED
* .0 : Dout, NOT_USED
*-----------------------------------------------------------------------------------
*/
P4 = _0000_0000; // P4 Data Register
P4IO = _1111_1111; // P4 Direction Register //0:input, 1:output
P4OD = _0000_0000; // P4 Open-drain Selection Register //0:push-pull, 1:open-drain
P4PU = _0000_0000; // P4 Pull-up Resistor Selection Register //0:disable, 1:enable
//cap bais mode
P4FSR =0 //Port 4 Function Selection Register
|(1<<7) //0:P47 port, 1:COM1/SEG0
|(1<<6) //0:P46 port, 1:COM0
|(1<<5) //0:P45 port, 1:CAPL
|(1<<4) //0:P44 port, 1:CAPH
|(1<<3) //0:P43 port, 1:VLC3
|(1<<2) //0:P42 port, 1:VLC2
|(1<<1) //0:P41 port, 1:VLC1
|(1<<0) //0:P40 port, 1:VLC0
;
/*
//internal bais mode
P4FSR =0 //Port 4 Function Selection Register
|(1<<7) //0:P47 port, 1:COM1/SEG0
|(1<<6) //0:P46 port, 1:COM0
|(0<<5) //0:P45 port, 1:CAPL
|(0<<4) //0:P44 port, 1:CAPH
|(0<<3) //0:P43 port, 1:VLC3
|(0<<2) //0:P42 port, 1:VLC2
|(0<<1) //0:P41 port, 1:VLC1
|(0<<0) //0:P40 port, 1:VLC0
;
*/
//7616S狼版快
/*--- Set Port_5 --------------------------------------------------------------------
* P5.7 : x
* .6 : x
* .5 : x
* .4 : x
* .3 : x
* .2 : x
* .1 : x
* .0 : x
*-----------------------------------------------------------------------------------
*/
P5 = _0000_0000; // P5 Data Register
P5IO = _1111_1111; // P5 Direction Register //0:input, 1:output
P5OD = _0000_0000; // P5 Open-drain Selection Register //0:push-pull, 1:open-drain
P5PU = _0000_0000; // P5 Pull-up Resistor Selection Register //0:disable, 1:enable
P5FSR =0 //Port 5 Function Selection Register
|(0<<7) //0:P57 port, 1:SEG32 //7616A俊綽絕瀾. 0 setting!!
|(0<<6) //0:P56 port, 1:SEG31 //7616A俊綽絕瀾. 0 setting!!
|(0<<5) //0:P55 port, 1:SEG30 //7616A俊綽絕瀾. 0 setting!!
|(0<<4) //0:P54 port, 1:SEG29 //7616A俊綽絕瀾. 0 setting!!
|(0<<3) //0:P53 port, 1:SEG28 //7616A俊綽絕瀾. 0 setting!!
|(0<<2) //0:P52 port, 1:SEG27 //7616A俊綽絕瀾. 0 setting!!
|(0<<1) //0:P51 port, 1:SEG26 //7616A俊綽絕瀾. 0 setting!!
|(0<<0) //0:P50 port, 1:SEG25 //7616A俊綽絕瀾. 0 setting!!
;
/*--- Set Port_6 --------------------------------------------------------------------
* P6.7 : Dout,NOT_USED 1, LCD
* .6 : Dout, NOT_USED 1, LCD
* .5 : Dout, NOT_USED 1, LCD
* .4 : Dout, NOT_USED 1, LCD
* .3 : Dout, NOT_USED 1, LCD
* .2 : Dout, NOT_USED 1, LCD
* .1 : Dout, NOT_USED 1, LCD
* .0 : Dout, NOT_USED 1, LCD
*-----------------------------------------------------------------------------------
*/
P6 = _0000_0000; // P6 Data Register
P6IO = _1111_1111; // P6 Direction Register //0:input, 1:output
P6OD = _0000_0000; // P6 Open-drain Selection Register //0:push-pull, 1:open-drain
P6PU = _0000_0000; // P6 Pull-up Resistor Selection Register //0:disable, 1:enable
P6FSR =0 //Port 6 Function Selection Register
|(0<<7) //0:P67 port, 1:SEG24
|(0<<6) //0:P66 port, 1:SEG23
|(0<<5) //0:P65 port, 1:SEG22
|(0<<4) //0:P64 port, 1:SEG21
|(0<<3) //0:P63 port, 1:SEG20
|(0<<2) //0:P62 port, 1:SEG19
|(0<<1) //0:P61 port, 1:SEG18
|(0<<0) //0:P60 port, 1:SEG17
;
/*--- Set Port_7 --------------------------------------------------------------------
* P7.7 : Dout,LCD_SEG16 1, LCD
* .6 : Dout, LCD_SEG15 1, LCD
* .5 : Dout, LCD_SEG14 1, LCD
* .4 : Dout, LCD_SEG13 1, LCD
* .3 : Dout, LCD_SEG12 1, LCD
* .2 : Dout, LCD_SEG11 1, LCD
* .1 : Dout, LCD_SEG10 1, LCD
* .0 : Dout, LCD_SEG9 1, LCD
*-----------------------------------------------------------------------------------
*/
P7 = _0000_0000; // P7 Data Register
P7IO = _1111_1111; // P7 Direction Register //0:input, 1:output
P7PU = _0000_0000; // P7 Pull-up Resistor Selection Register //0:disable, 1:enable
P7FSR =0 //Port 7 Function Selection Register
|(1<<7) //0:P77 port, 1:SEG16
|(1<<6) //0:P76 port, 1:SEG15
|(1<<5) //0:P75 port, 1:SEG14
|(1<<4) //0:P74 port, 1:SEG13
|(1<<3) //0:P73 port, 1:SEG12
|(1<<2) //0:P72 port, 1:SEG11
|(1<<1) //0:P71 port, 1:SEG10
|(1<<0) //0:P70 port, 1:SEG9
;
/*--- Set Port_8 --------------------------------------------------------------------
* P8.7 : Dout,x 1, LCD
* .6 : Dout, x 1, LCD
* .5 : Dout, x 1, LCD
* .4 : Dout, x 1, LCD
* .3 : Dout, LCD_SEG4 1, LCD
* .2 : Dout, LCD_SEG3 1, LCD
* .1 : Dout, LCD_COM3 1, LCD
* .0 : Dout, LCD_COM2 1, LCD
*-----------------------------------------------------------------------------------
*/
P8 = _0000_0000; // P8 Data Register
P8IO = _1111_1111; // P8 Direction Register //0:input, 1:output
P8PU = _0000_0000; // P8 Pull-up Resistor Selection Register //0:disable, 1:enable
P8FSR =0 //Port 8 Function Selection Register
//|(1<<7) //0:P87 port, 1:SEG8
//|(1<<6) //0:P86 port, 1:SEG7
//|(1<<5) //0:P85 port, 1:COM7/SEG6
//|(1<<4) //0:P84 port, 1:COM6/SEG5
|(1<<3) //0:P83 port, 1:COM5/SEG4
|(1<<2) //0:P82 port, 1:COM4/SEG3
|(1<<1) //0:P81 port, 1:COM3/SEG2
|(1<<0) //0:P80 port, 1:COM2/SEG1
;
//peri setting
/*--- Set Timer0 (8-Bit, 4mSec Interval) -------------------------------------------
* T0CR : 0000 0000 = 0x00 : Timer0 Control Register
* T0DR : 249 : Timer0 Data Register
* interrupt 林扁 = 16*(T0DR+1) = 16*250 = 4msSec
*-----------------------------------------------------------------------------------
*/
/*
T0CR = 0x00;
T0DR = 249; // 128 /8Mhz=16us, intrupte 林扁 =16uSec(T0DR + 1 ) = 4msSec
T0CR =0
|(1<<7) //0:Timer0 disable, 1:Timer0 enable
|(0<<4) //0:0:Timer0/counter, 1:PWM, 2:capture
|(4<<1) //0:fx/2, 1:fx/4, 2:fx/8, 3:fx/32, 4:fx/128, 5:fx/512, 6:fx/2048, 7:EC0
|(1<<0) //0:Clear Timer 0 Counter no effect, 1:Clear Timer 0 Counter auto clear
;
*/
//林扁函版
/*--- Set Timer0 (8-Bit, 0.5mSec Interval) -------------------------------------------
* T0CR : 0000 0000 = 0x00 : Timer0 Control Register
* T0DR : 124 : Timer0 Data Register
* interrupt 林扁 = 4*(T0DR+1) = 4*250 = 4msSec
*-----------------------------------------------------------------------------------
*/
T0CR = 0x00;
T0DR = 124; // fx/32, 32/8Mhz= 4uSec(T0DR + 1 ) = 500uSec
T0CR =0
|(1<<7) //0:Timer0 disable, 1:Timer0 enable
|(0<<4) //0:0:Timer0/counter, 1:PWM, 2:capture
|(3<<1) //0:fx/2, 1:fx/4, 2:fx/8, 3:fx/32, 4:fx/128, 5:fx/512, 6:fx/2048, 7:EC0
|(1<<0) //0:Clear Timer 0 Counter no effect, 1:Clear Timer 0 Counter auto clear
;
//2013_02_01
//rem out function
/*--- Set Timer1 (PWM, 38KHz, 1/3Duty for Carrier Freq.) -------------------------
* T1CR : 0001 0010 = 0x12 : Timer1 Control Register
* T1DRH : 34 : Timer1 Data High Register
* T1DRL : 69 : Timer1 Data Low Register
* CARCR : 0x02 : Carrier Control Register
* NOTE : Timer1, REMOUT, 38KHz, 1/3 or 1/2 Duty
* Time1_Int=2/8MHz*1 = 0.25uSec
* 38KHz = 26.316uSec, 1/3 Duty :
* - On_Time = 26.316/3 = 8.772 uSec
* = 0.25*(T1DRH+1) = 0.25*(34+1) = 8.75
* - Off_Time = 26.316*2/3 = 17.544 uSec
* = 0.25*(T1DRL+1) = 0.25*(69+1) = 17.5
*-----------------------------------------------------------------------------------
*/
//fx=8Mhz老版快
T1CR = 0x00;
T1CR =0 // fx/1, 2/8Mhz= 0.25uSec
|(0<<7) //0:Timer1 disable, 1:Timer1 enable
|(0<<6) //0:T1 Interrupt no generation, 1:T1 Interrupt generation //6832客促撫 !! //org
|(1<<4) //0:Timer1/counter, 1:carrier
|(1<<2) //0:fx/1, 1:fx/2, 2:fx/4, 3:fx/8
|(1<<1) //0:0:temporary count stop, 1:continue count // 犬牢竅扁 0撈擱某府絹臼唱咳
|(0<<0) //0:Counter stop, 1:Clear counter and start
;
/*
//fx=4Mhz老版快
T1CR =0 // fx/1, 1/4Mhz= 0.25uSec
|(0<<7) //0:Timer1 disable, 1:Timer1 enable
|(0<<6) //0:T1 Interrupt no generation, 1:T1 Interrupt generation //6832客促撫 !! //org
|(1<<4) //0:Timer1/counter, 1:carrier
|(0<<2) //0:fx/1, 1:fx/2, 2:fx/4, 3:fx/8
|(1<<1) //0:0:temporary count stop, 1:continue count // 犬牢竅扁 0撈擱某府絹臼唱咳
|(0<<0) //0:Counter stop, 1:Clear counter and start
;
*/
CARCR =0
|(0<<4)//0:Elapsed time for low data value, 1:Elapsed time for high data value, 2:Elapsed time for low and high data values
|(1<<1)//0:0:one-shot, 1:Repeating
|(0<<0)//0:REM low, 1:REM high
;
T1DRH =PWM_38K13D_ON;
T1DRL =PWM_38K13D_OFF;
/*--- Set ADC(12bit) -----------------------------------------------------------------------
* ADCCRH : 0000 0010 = 0x02 : A/D Converter Control High Register
* fx=4Mhz, adc_conversion_clock=4Mhz/4=1Mhz
* ADCCRL : 0000 0010 = 0x20 : A/D Converter Control Low Register
*-----------------------------------------------------------------------------------
*/
ADCCRH =0
|(0<<7) //0:ADC Interrupt no generation, 1:ADC Interrupt generation
|(0<<2) //0:MSB align, 1:LSB align
|(2<<0) //0:fx/1, 1:fx/2, 2:fx/4, 3:fx/8
;
ADCCRL =0
|(0<<7) //0:ADC module disable, 1:ADC module enable
|(0<<6) //0:No effect, 1:ADC Conversion Start and auto cleared after conversion
|(1<<5) //0:Internal Reference (VDD), 1:External Reference(AVREF)
|(0<<4) //0:During A/D Conversion, 1:A/D Conversion finish
|(0<<0) //0:AN0, 1:AN1, 2:AN2, 3:AN3, 4:AN4, 5:AN5, 6:AN6, 7:AN7
;
/*--- Set LVI (2.2V Detection) ------------------------------------------------------
* LVICR : 0000 0000 = 0x00 : Low Voltage Indicator Control Register
*-----------------------------------------------------------------------------------
*/
LVICR =0
|(0<<5) //0:Low Voltage Indicator flag No detection, 1:Low Voltage Indicator flag detection
|(0<<4) //0:LVI disable, 1:LVI Enable
|(6<<0) //0:2.00V, 1:2.10V, 2:2.20V, 3:2.32V, 4:2.44V, 5:2.59V, 6:2.75V, 7:2.93V, 8:3.14V, 9:3.38V,
; //10:3.67V, 11:4.00V, 12:4.40V, 13:External Reference (LVIREF), 14:Not available, 15:Not available
//-----------------------------------------
// LCD initialize
//-----------------------------------------
/*--- Set LCD ------------------------------------------------------------------------
* LCDCRH : 0000 0000 = 0x00 : LCD Driver Control High Register
* LCDCRL : 0011 0101 = 0x35 : LCD Driver Control Low Register
* LCDCCR : 0000 0011 = 0x00 : LCD Driver Contrast Control Register
* 256Hz, 1/4-Duty,1/3-Bias, Internal resistor bias mode
*-----------------------------------------------------------------------------------
*/
//Capacitor bias mode
LCDCRH =0
|(0<<3) //0:Not select P-Tr resistor, 1:Select P-Tr resistor 2R
|(2<<1) //0:Internal resistor bias, 1:External resistor bias, 2:Capacitor bias (Voltage booster)
|(1<<0) //0:Display off (The LCD block and voltage booster are off), 1:Normal display on(voltage booster is turn on)
;
LCDCRL =0
|(3<<2) //0:1/8Duty&1/4 bias, 1:1/6Duty&1/4 bias, 2:1/5Duty&1/3 bias, 3:1/4Duty&1/3 bias, 4:1/3Duty&1/3 bias //org
//5:1/3Duty&1/2 bias(60K), 6:1/3Duty&1/2 bias, 7:1/2Duty&1/2 bias, 8:1/2Duty&1/2 bias, 9:Static
|(1<<0) //0:fLCD = 128Hz, 1:fLCD = 256Hz, 2:fLCD = 512Hz, 3:fLCD = 1024Hz //org
;
LCDCCR =0
|(0<<0) //0:1.00V, 1:1.045V, 2:1.09V, 3:1.135V, 4:1.18V, 5:1.225V, 6:1.27V, 7:1.315V
; //8:1.36V, 9:1.405V, 10:1.45V, 11:1.50V, 12:1.55V, 13:1.60V, 14:1.65V, 15:1.70V
/*
//Internal resistor bias mode
LCDCRH =0
|(0<<3) //0:Not select P-Tr resistor, 1:Select P-Tr resistor 2R
|(0<<1) //0:Internal resistor bias, 1:External resistor bias, 2:Capacitor bias (Voltage booster)
|(0<<0) //0:Display off (The LCD block and voltage booster are off), 1:Normal display on(voltage booster is turn on)
;
LCDCRL =0
|(3<<2) //0:1/8Duty&1/4 bias, 1:1/6Duty&1/4 bias, 2:1/5Duty&1/3 bias, 3:1/4Duty&1/3 bias, 4:1/3Duty&1/3 bias //org
//5:1/3Duty&1/2 bias(60K), 6:1/3Duty&1/2 bias, 7:1/2Duty&1/2 bias, 8:1/2Duty&1/2 bias, 9:Static
|(1<<0) //0:fLCD = 128Hz, 1:fLCD = 256Hz, 2:fLCD = 512Hz, 3:fLCD = 1024Hz //org
;
LCDCCR =0
|(0<<0) //0:1.00V, 1:1.045V, 2:1.09V, 3:1.135V, 4:1.18V, 5:1.225V, 6:1.27V, 7:1.315V
; //8:1.36V, 9:1.405V, 10:1.45V, 11:1.50V, 12:1.55V, 13:1.60V, 14:1.65V, 15:1.70V
*/
/*--- Set Interrupt -----------------------------------------------------------------
*
*-----------------------------------------------------------------------------------
*/
/*
//7616A 焊靛牢版快
EIPOL0 =0
|(0<<6) //0:No interrupt at any edge, 1:extint13 Rising Edge, 2:extint13 Falling edge , 3:extint13 both Edge
|(0<<4) //0:No interrupt at any edge, 1:extint12 Rising Edge, 2:extint12 Falling edge , 3:extint12 both Edge
|(0<<2) //0:No interrupt at any edge, 1:extint10 Rising Edge, 2:extint10 Falling edge , 3:extint10 both Edge
|(0<<0) //0:No interrupt at any edge, 1:extint8 Rising Edge, 2:extint8 Falling edge , 3:extint8 both Edge
;
EIFLAG0 =0
|(0<<7) //0:T0 overflow interrupt no generation, 1:T0 overflow interrupt generation
|(0<<6) //0:T0 match interrupt no generation, 1:T0 match interrupt generation
|(0<<5) //0:Serial I/O interrupt no generation, 1:Serial I/O interrupt generation
|(0<<3) //0:extint13 External Interrupt not occurred, 1:extint13 External Interrupt occurred
|(0<<2) //0:extint12 External Interrupt not occurred, 1:extint12 External Interrupt occurred
|(0<<1) //0:extint10 External Interrupt not occurred, 1:extint10 External Interrupt occurred
|(0<<0) //0:extint8 External Interrupt not occurred, 1:extint8 External Interrupt occurred
;
EIPOL1H =0
|(0<<6) //0:No interrupt at any edge, 1:extint7 Rising Edge, 2:extint7 Falling edge , 3:extint7 both Edge
|(0<<4) //0:No interrupt at any edge, 1:extint6 Rising Edge, 2:extint6 Falling edge , 3:extint6 both Edge
|(0<<2) //0:No interrupt at any edge, 1:extint5 Rising Edge, 2:extint5 Falling edge , 3:extint5 both Edge
|(0<<0) //0:No interrupt at any edge, 1:extint4 Rising Edge, 2:extint4 Falling edge , 3:extint4 both Edge
;
EIPOL1L =0
|(2<<6) //0:No interrupt at any edge, 1:extint3 Rising Edge, 2:extint3 Falling edge , 3:extint3 both Edge
|(2<<4) //0:No interrupt at any edge, 1:extint2 Rising Edge, 2:extint2 Falling edge , 3:extint2 both Edge
|(2<<2) //0:No interrupt at any edge, 1:extint1 Rising Edge, 2:extint1 Falling edge , 3:extint1 both Edge
|(2<<0) //0:No interrupt at any edge, 1:extint0 Rising Edge, 2:extint0 Falling edge , 3:extint0 both Edge
;
EIFLAG1 =0
|(0<<7) //0:extint7 External Interrupt not occurred, 1:extint7 External Interrupt occurred
|(0<<6) //0:extint6 External Interrupt not occurred, 1:extint6 External Interrupt occurred
|(0<<5) //0:extint5 External Interrupt not occurred, 1:extint5 External Interrupt occurred
|(0<<4) //0:extint4 External Interrupt not occurred, 1:extint4 External Interrupt occurred
|(1<<3) //0:extint3 External Interrupt not occurred, 1:extint3 External Interrupt occurred
|(1<<2) //0:extint2 External Interrupt not occurred, 1:extint2 External Interrupt occurred
|(1<<1) //0:extint1 External Interrupt not occurred, 1:extint1 External Interrupt occurred
|(1<<0) //0:extint0 External Interrupt not occurred, 1:extint0 External Interrupt occurred
;
*/
//7416S 焊靛牢版快
EIPOL0 =0
|(2<<6) //0:No interrupt at any edge, 1:extint13 Rising Edge, 2:extint13 Falling edge , 3:extint13 both Edge
|(0<<4) //0:No interrupt at any edge, 1:extint12 Rising Edge, 2:extint12 Falling edge , 3:extint12 both Edge
|(0<<2) //0:No interrupt at any edge, 1:extint10 Rising Edge, 2:extint10 Falling edge , 3:extint10 both Edge
|(0<<0) //0:No interrupt at any edge, 1:extint8 Rising Edge, 2:extint8 Falling edge , 3:extint8 both Edge
;
EIFLAG0 =0
|(0<<7) //0:T0 overflow interrupt no generation, 1:T0 overflow interrupt generation
|(0<<6) //0:T0 match interrupt no generation, 1:T0 match interrupt generation
//|(0<<5) //0:Serial I/O interrupt no generation, 1:Serial I/O interrupt generation
|(1<<3) //0:extint13 External Interrupt not occurred, 1:extint13 External Interrupt occurred
|(0<<2) //0:extint12 External Interrupt not occurred, 1:extint12 External Interrupt occurred
|(0<<1) //0:extint10 External Interrupt not occurred, 1:extint10 External Interrupt occurred
|(0<<0) //0:extint8 External Interrupt not occurred, 1:extint8 External Interrupt occurred
;
EIPOL1H =0
|(2<<6) //0:No interrupt at any edge, 1:extint7 Rising Edge, 2:extint7 Falling edge , 3:extint7 both Edge
|(2<<4) //0:No interrupt at any edge, 1:extint6 Rising Edge, 2:extint6 Falling edge , 3:extint6 both Edge
|(0<<2) //0:No interrupt at any edge, 1:extint5 Rising Edge, 2:extint5 Falling edge , 3:extint5 both Edge
|(0<<0) //0:No interrupt at any edge, 1:extint4 Rising Edge, 2:extint4 Falling edge , 3:extint4 both Edge
;
EIPOL1L =0
|(0<<6) //0:No interrupt at any edge, 1:extint3 Rising Edge, 2:extint3 Falling edge , 3:extint3 both Edge
|(0<<4) //0:No interrupt at any edge, 1:extint2 Rising Edge, 2:extint2 Falling edge , 3:extint2 both Edge
|(0<<2) //0:No interrupt at any edge, 1:extint1 Rising Edge, 2:extint1 Falling edge , 3:extint1 both Edge
|(2<<0) //0:No interrupt at any edge, 1:extint0 Rising Edge, 2:extint0 Falling edge , 3:extint0 both Edge
;
EIFLAG1 =0
|(1<<7) //0:extint7 External Interrupt not occurred, 1:extint7 External Interrupt occurred
|(1<<6) //0:extint6 External Interrupt not occurred, 1:extint6 External Interrupt occurred
|(0<<5) //0:extint5 External Interrupt not occurred, 1:extint5 External Interrupt occurred
|(0<<4) //0:extint4 External Interrupt not occurred, 1:extint4 External Interrupt occurred
|(0<<3) //0:extint3 External Interrupt not occurred, 1:extint3 External Interrupt occurred
|(0<<2) //0:extint2 External Interrupt not occurred, 1:extint2 External Interrupt occurred
|(0<<1) //0:extint1 External Interrupt not occurred, 1:extint1 External Interrupt occurred
|(1<<0) //0:extint0 External Interrupt not occurred, 1:extint0 External Interrupt occurred
;
IE =0
|(0<<7) //0:All int disable, 1:All int enable
|(0<<5) //0:ext int0~7 disable, 1:ext int0~7 enable // 促矯犬牢 //stop mode俊輯 enable 矯挪促.
|(0<<3) //0:ext int13 disable, 1:ext int13 enable
//|(0<<2) //0:ext int12 disable, 1:ext int12 enable //7616A俊綽絕瀾. 0 setting!!
//|(0<<1) //0:ext int10 disable, 1:ext int10 enable
//|(0<<0) //0:ext int8 disable, 1:ext int8 enable //7616A俊綽絕瀾. 0 setting!!
;
IE1 =0
|(0<<5) //0:SIO int disable, 1:SIO int enable //7616A俊綽絕瀾. 0 setting!!
|(0<<4) //0:UART TX int disable, 1:UART TX int enable
|(0<<3) //0:UART RX int13 disable, 1:UART RX int13 enable
;
IE2 =0
|(0<<4) //0:Timer 3 match interrupt disable, 1:Timer 3 match interrupt enable
|(0<<3) //0:Timer 2 match interrupt disable, 1:Timer 2 match interrupt enable
|(0<<2) //0:Timer 1 match interrupt disable, 1:Timer 1 match interrupt enable
|(1<<1) //0:Timer 0 match interrupt disable, 1:Timer 0 match interrupt enable
|(0<<0) //0:Timer 0 overflow interrupt disable, 1:Timer 0 overflow interrupt enable
;
IE3 =0
|(0<<4) //0:BIT int disable, 1:BIT int enable
|(0<<3) //0:WDT int disable, 1:WDT int enable // 犬牢
|(1<<2) //0:WT int disable, 1:WT int enable
|(0<<0) //0:ADC int disable, 1:ADC int enable
;
#endif
}
//==================================================================
// Main Subroutine
//==================================================================
main(void)
{
int test = 0;
cli(); //nwma
Initial(); // start-up initialize
Lcd_Initialize(); // LCD display off
sei(); //nwma
// 2013_02_27_stop mode
//rKey_Stop = 0; // 5檬饒 Stop mode 柳澇
rKey_Stop = 10; // 5檬饒 Stop mode 柳澇
rLcd_Mode = LCD_CLOCK; //
while (1) //
{
//w WDTR = 0xFF; // watchdog timer refresh ( 2 sec )
Process_Key(); // key, ADC function
Process_Time(); // Clock count up and measurement
Process_Lcd(); // LCD, LED
if(!(rKey_Stop)) // 1s x n = ?
{
//clr(LCDCRH, LCD_ON); // lcd modul disable //lcd on 矯 20uA瀝檔家葛
//interrupt setting
cli();
clr(IE2, B8_1); // Disable Timer_0 INT
set(IE, B8_5); // Enable External INT 0/6/7
set(IE, B8_3); // Enable External INT 13
sei();
//2013_11_21 by nakwon FLL test
clr(OSCCR, B8_2);//enable IRC
//fx=FLL 8Mhz --> 2ms 救瀝拳
//FLL fx=8Mhz, bit clock 8Mhz/4096=500us, overflow period=bit clock* 4= 2ms
//P40 = 1; //救利拳 test 儈
BITCR=(1<<3)|(1<<0); // BIT counter clear!!
while((BITCR&0x80)==0); // BIT 救瀝拳 2ms wait time @FLL 8Mhz
//P40 = 0; //救利拳 test 儈
//
clr(SCCR, 0x03);//change FLL -> IRC
clr(FLLCR, B8_0);//disable FLL
//fx=INT_OSC 1Mhz --> 16ms 救瀝拳
//internal fx=1Mhz, bit clock 1Mhz/4096=4ms, overflow period=bit clock* 4= 16ms
//P40 = 1; //救利拳 test 儈
BITCR=(1<<3)|(1<<0); // BIT counter clear!!
while((BITCR&0x80)==0); // BIT 救瀝拳 16ms wait time @ int_osc 1Mhz
//P40 = 0; //救利拳 test 儈
//--- Enter the Stop Mode ---
PCON = 0x03; // STOP Instruction Enable //wt enable/sub osc enable 矯 6uA瀝檔家葛
_nop_();
_nop_();
_nop_();
_nop_();
_nop_();
set(FLLCR, B8_0);//enable FLL
//set(P6, _0000_0100);
//internal fx=1Mhz, bit clock 1Mhz/4096=4ms, overflow period=bit clock* 4= 16ms
BITCR=(1<<3)|(1<<0); // BIT counter clear!!
while((BITCR&0x80)==0); // BIT 救瀝拳 16ms wait time @ int_osc 1Mhz
//for(test = 0; test < 0xff ;test++)
//{
// _nop_();
//}
set(SCCR, 0x03);//change IRC -> FLL
set(OSCCR, B8_2);//disable IRC
_nop_();
……………………
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