// Setup shadowing EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW; EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // Load on Zero EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
// Set actions EPwm1Regs.AQCTLA.bit.CAU = AQ_SET; // Set PWM1A on event A, up count EPwm1Regs.AQCTLA.bit.CAD = AQ_CLEAR; // Clear PWM1A on event A, down count
EPwm1Regs.AQCTLB.bit.CBU = AQ_SET; // Set PWM1B on event B, up count EPwm1Regs.AQCTLB.bit.CBD = AQ_CLEAR; // Clear PWM1B on event B, down count
// Interrupt where we will change the Compare Values EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_PRD; // Select INT on PRD event EPwm1Regs.ETSEL.bit.INTEN = 1; // Enable INT EPwm1Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on 1ST event
EPwm1Regs.CMPA.half.CMPA=0x0C35;}
interrupt void epwm1_isr(void){
if ((i>=0)&&(i<N/2)){ EPwm1Regs.CMPA.half.CMPA=EPwm1Regs.TBPRD*((1.0+M*sina[ i])/2.0); EPwm1Regs.CMPB=EPwm1Regs.TBPRD*((1.0+M*sinb[ i])/2.0); }
if ((i>=N/2)&&(i<N)){ EPwm1Regs.CMPA.half.CMPA=EPwm1Regs.TBPRD*((1.0-M*sina[i-30])/2.0); EPwm1Regs.CMPB=EPwm1Regs.TBPRD*((1.0-M*sinb[i-30])/2.0); }