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標(biāo)題: 藍(lán)牙串口通信遇到問(wèn)題 [打印本頁(yè)]

作者: sassssx 時(shí)間: 2015-12-27 18:25
標(biāo)題: 藍(lán)牙串口通信遇到問(wèn)題
寫(xiě)上程序之后  4.4 接hc05藍(lán)牙模塊的發(fā)送端  7.3 6.7接led  沒(méi)有反應(yīng)

#include "msp430f5529.h"
unsigned char RXD_data;
void UART_Init()
{
P4SEL |= BIT5+BIT4;
P4DIR |= BIT4;       //輸入

UCA1CTL1 |= UCSWRST;
UCA1CTL1 |= UCSSEL_1; //時(shí)鐘源是ACLK,32768,生成9600
UCA1BR0 = 3;
UCA1BR1 = 0;
UCA1MCTL |= UCBRS_3 + UCBRF_0;
UCA1CTL1 &= ~UCSWRST;

UCA1IE |= UCRXIE ;  // 數(shù)據(jù)接收中斷
}

/**************************************
void Clock_Init() //配置時(shí)鐘    網(wǎng)上找的列程
{
   P5SEL |= BIT2+BIT3+BIT4+BIT5;                      // Port select XT1
   UCSCTL6 &= ~(XT1OFF);                            // XT1 On
   UCSCTL6 &= ~(XT2OFF);                            // XT2 On
   UCSCTL6 |= XCAP_3;                                  // Internal load cap
   do
   {
   UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + DCOFFG);
                                             // Clear XT2,XT1,DCO fault flags
   SFRIFG1 &= ~OFIFG;                      // Clear fault flags
   }while (SFRIFG1&OFIFG);                   // Test oscillator fault flag

   UCSCTL3 = SELREF_0+FLLREFDIV_0;                      // Set DCO FLL reference = XT2

   __bis_SR_register(SCG0);                   // Disable the FLL control loop
   UCSCTL1 = DCORSEL_7;                         // Select DCO range 16MHz operation
   UCSCTL0 = 0x0000;                            // Set lowest possible DCOx, MODx
   UCSCTL2 |= FLLD_0+488;                         // Set DCO Multiplier for 8MHz
                                                // (15 + 1) * FLLRef = F_dcoclkdiv
                                                //  F_dcoclkdiv=F_dco
                                                // (488+ 1) * 32768= 16MHz
   __bic_SR_register(SCG0);                      // Enable the FLL control loop

   __delay_cycles(250000);

   UCSCTL4 |=SELA_0+SELS_5;                //ACLK = 32768HZ,SMCLK= 1MHZ,MCLK= 16MHZ
   UCSCTL5 |=DIVS_2;                      //4分頻
}
**************************************/
void main()  // 主函數(shù)
{
  WDTCTL |= WDTPW + WDTHOLD;
// Clock_Init();
  UART_Init();
  _EINT();

   P6DIR |= BIT6; //定義針腳  輸出
   P6DIR |= BIT7; //輸出

   P7DIR|=BIT2; //輸出
   P7DIR|=BIT3; //輸出

  while(1)
  {
switch(RXD_data)
{
case '1':
               P7OUT|=BIT3;                   // 1
                 P6OUT|=BIT7;                // 1
                 P6OUT&=~BIT6;                // 0
                 P7OUT&=~BIT2;             //0

   break;
case '2':
                  P6OUT&=~BIT7;       //0
                P6OUT|=BIT6;       //1
                P7OUT&=~BIT3;    //0
              P7OUT|=BIT2;    //1

   break;
case '3':
                  P7OUT|=BIT3;                // 1
                P6OUT&=~BIT7;             // 0
                P6OUT&=~BIT6;             // 0
                P7OUT&=~BIT2;             //0
   break;
case '4':
                  P7OUT&=~BIT3;                //0
                P6OUT|=BIT7;                // 1
                P6OUT&=~BIT6;                // 0
                P7OUT&=~BIT2;             //0
   break;
case '5':
               P6OUT&=~BIT7;                      //0
           P6OUT&=~BIT6;                   //0
           P7OUT&=~BIT2;                   //0
           P7OUT&=~BIT3;                   //0

   break;
default:
   break;
}
  }
}

#pragma vector=USCI_A1_VECTOR

__interrupt void USCI_A0_ISR(void) //  接收中斷
{
_DINT();       //先關(guān)上中斷，接收正確的數(shù)據(jù)
switch(__even_in_range(UCA0IV,4))
{
case 0:break;
case 2:
   while(!(UCA0IFG&UCRXIFG));
   RXD_data = UCA0RXBUF; //將接收緩存器的字符產(chǎn)送給發(fā)送緩存器
   while(!(UCA0IFG&UCRXIFG));
   break;
case 4:break;
default: break;
}
_EINT();
}

作者: lulutian 時(shí)間: 2015-12-28 14:00
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