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Library ieee; Use ieee.std_logic_1164.all; Use ieee.std_logic_unsigned.all; Entity LCD1602 is Port(clk,CR:in std_logic; RW,EN,RS:out std_logic; Qdata:out std_logic_vector(7 downto 0)); end; Architecture LCD of LCD1602 is signal Qfp:integer range 0 to 4999999; signal cp:std_logic; begin process(clk,CR) begin if CR='0' then Qfp<=0; cp<='0'; elsif clk'event and clk='1' then Qfp<=Qfp+1; if Qfp=0 then cp<=not cp; end if; end if; end process; RW<='0'; EN<=cp; process(cp) variable cnt:integer range 0 to 37; begin if CR='0' then cnt:=0; Qdata<="00000001"; elsif cp'event and cp='1' then cnt:=cnt+1; end if; case cnt is -------Init LCD1602----------- when 0 =>RS<='0';Qdata<="00111000"; --0x38, when 1 =>RS<='0';Qdata<="00001100"; --0x0C when 2 =>RS<='0';Qdata<="00000001"; --0x01 when 3 =>RS<='0';Qdata<="00000110"; --0x60 ---------------------------------- when 4 =>RS<='0';Qdata<="10000000"; --display,0x00+0x80,1h1w -------data display------------- when 5=>RS<='1';Qdata<="10100000";--空格 when 6=>RS<='1';Qdata<="10100000";--空格 when 7=>RS<='1';Qdata<="10100000";--空格 when 8=>RS<='1';Qdata<="01011001"; --Y when 9=>RS<='1';Qdata<="01110101";--u when 10=>RS<='1';Qdata<="01101010";--j when 11=>RS<='1';Qdata<="01101001";--i when 12=>RS<='1';Qdata<="01100001";--a when 13=>RS<='1';Qdata<="01101110";--n when 14=>RS<='1';Qdata<="01110001";--q when 15=>RS<='1';Qdata<="01110101";--u when 16=>RS<='1';Qdata<="01100001";--a when 17=>RS<='1';Qdata<="01101110";--n when 18=>RS<='1';Qdata<="10100000";---空格 when 19=>RS<='1';Qdata<="10100000";---空格 when 20=>RS<='1';Qdata<="10100000";---空格 --------------------------- when 21=>RS<='0';Qdata<="11000000";--設定顯示的位置在10H+80H， ---------------------------- when 22=>RS<='1';Qdata<="01000100";---D diangong xueyuan when 23=>RS<='1';Qdata<="01101001";---i when 24=>RS<='1';Qdata<="01100001";---a when 25=>RS<='1';Qdata<="01101110";---n when 26=>RS<='1';Qdata<="01100111";---g when 27=>RS<='1';Qdata<="01101111";---o when 28=>RS<='1';Qdata<="01101110";--n when 29=>RS<='1';Qdata<="01100111";---g when 30=>RS<='1';Qdata<="10100000";--- 空格 when 31=>RS<='1';Qdata<="01011000";---X when 32=>RS<='1';Qdata<="01110101";---u when 33=>RS<='1';Qdata<="01100101";---e when 34=>RS<='1';Qdata<="01111001";---y when 35=>RS<='1';Qdata<="01110101";---u when 36=>RS<='1';Qdata<="01100001";---a when 37=>RS<='1';Qdata<="01101110";---n end case; end process; end;
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